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The operation of some aspects of data memory are changed when the PIC18 extended instruction set is enabled. See
Section 5.5 “Data Memory and the Extended Instruction Set” for more information.
The data memory in PIC18 devices is implemented as static RAM. Each register in the data memory has a 12-bit address, allowing up to 4096 bytes of data memory. The memory space is divided into as many as 16 banks that contain 256 bytes each; PIC18F4458 devices implement 1 bank. Figure 5-5 shows the data memory organization for the PIC18F4458 devices when Read Out Protected Microchip MCU PIC18F4458 Eeprom File.
The data memory contains Special Function Registers (SFRs) and General Purpose Registers (GPRs). The SFRs are used for control and status of the controller and peripheral functions, while GPRs are used for data storage and scratchpad operations in the user’s application. Any read of an unimplemented location will read as ‘0’s.
The instruction set and architecture allow operations across all banks. The entire data memory may be accessed by Direct, Indirect or Indexed Addressing modes. Addressing modes are discussed later in this subsection after Read Out Protected Microchip MCU PIC18F4458 Eeprom File.
To ensure that commonly used registers (SFRs and select GPRs) can be accessed in a single cycle, PIC18 devices implement an Access Bank. This is a 256-byte memory space that provides fast access to SFRs and the lower portion of GPR Bank 0 without using the BSR. Section 5.3.2 “Access Bank” provides a detailed description of the Access RAM before EXTRACT IC.