When PRI_IDLE mode is selected, the designated primary oscillator continues to run without interruption to facilitate the process of Read Out Protected MCU PIC16F1933 Program. For all other power-managed modes, the oscillator using the OSC1 pin is disabled. The OSC1 pin (and OSC2 pin, if used by the oscillator) will stop oscillating.  

In Secondary Clock modes (SEC_RUN and SEC_IDLE), the Timer1 oscillator is operating and providing the device clock. The Timer1 oscillator may also run in all power-managed modes if required to clock Timer1 or Timer3. In Internal Oscillator modes (RC_RUN and RC_IDLE), the internal oscillator block provides the device clock source.

The 31 kHz INTRC output can be used directly to provide the clock and may be enabled to support various special features, regardless of the power managed mode in the process of Extracting Chip PIC12CE519 Heximal (see Section 19.2 “Watchdog Timer (WDT)”, Section 19.3 “Two-Speed Start-up” and Section 19.4 “Fail-Safe Clock Monitor” for more information on WDT, Fail-Safe Clock Monitor and Two-Speed Start-up).

The INTOSC output at 8 MHz may be used directly to clock the device or may be divided down by the postscaler. The INTOSC output is disabled if the clock is provided directly from the INTRC output. If the Sleep mode is selected, all clock sources are stopped for the purpose of Microcontroller PIC16LF526 Heximal extraction. Since all the transistor switching currents have been stopped, Sleep mode achieves the lowest current consumption of the device (only leakage currents).

Enabling any on-chip feature that will operate during Sleep will increase the current consumed during Sleep. The INTRC is required to support WDT operation. The Timer1 oscillator may be operating to support a real-time clock by Crack MCU. Other features may be operating that do not require a device clock source (i.e., INTn pins and others). Peripherals that may add significant current consumption are listed in Section 22.0 “Electrical Characteristics”.