Read MCU AT89C51RB2 Eprom file and copy the firmware to blank Microcontroller AT89C51RB2 for MCU Cloning;
PCA Modules: each one of the five compare/capture Modules has six possible functions. It can perform:
16-bit Capture, positive-edge triggered
16-bit Capture, negative-edge triggered
16-bit Capture, both positive and negative-edge triggered
16-bit Software Timer
16-bit High-speed Output
8-bit Pulse Width Modulator
In addition, Module 4 can be used as a Watchdog Timer. Each Module in the PCA has a special function register associated with it. These registers are: CCAPM0 for Module 0, CCAPM1 for Module 1, etc. (see Table 24). The registers contain the bits that control the mode that each Module will operate in when copy MCU at89c5131a software.
The ECCF bit (CCAPMn. 0 where n = 0, 1, 2, 3, or 4 depending on the Module) enables the CCF flag in the CCON SFR to generate an interrupt when a match or compare occurs in the associated Module. PWM (CCAPMn. 1) enables the pulse width modulation mode. The TOG bit (CCAPMn. 2) when set causes the CEX output associated with the Module to toggle when there is a match between the PCA counter and the Module’s capture/compare register.
The match bit MAT (CCAPMn. 3) when set will cause the CCFn bit in the CCON register to be set when there is a match between the PCA counter and the Module’s capture/compare register. The next two bits CAPN (CCAPMn. 4) and CAPP (CCAPMn. 5) determine the edge that a capture input will be active on. The CAPN bit enables the negative edge, and the CAPP bit enables the positive edge. If both bits are set both edges will be enabled and a capture will occur for either transition if extract microcontroller at89ls8252 code.
The last bit in the register ECOM (CCAPMn. 6) when set enables the comparator function. All of the PCA Modules can be used as PWM outputs. Figure 15 shows the PWM function. The frequency of the output depends on the source for the PCA timer. All of the Modules will have the same frequency of output because they all share the PCA timer.
The duty cycle of each Module is independently variable using the module’s capture register CCAPLn. When the value of the PCA CL SFR is less than the value in the module’s CCAPLn SFR the output will be low, when it is equal to or greater than the output will be high. When CL overflows from FF to 00, CCAPLn is reloaded with the value in CCAPHn. This allows updating the PWM without glitches. The PWM and ECOM bits in the module’s CCAPMn register must be set to enable the PWM mode.
An on-board watchdog timer is available with the PCA to improve the reliability of the system without increasing chip count. Watchdog timers are useful for systems that are susceptible to noise, power glitches, or electrostatic discharge. Module 4 is the only PCA Module that can be programmed as a watchdog. However, this Module can still be used for other modes if the watchdog is not needed. Figure 13 shows a diagram of how the watchdog works. The user pre-loads a 16-bit value in the compare registers before extract MCU at89c5131 code.
Just like the other compare modes, this 16-bit value is compared to the PCA timer value. If a match is allowed to occur, an internal reset will be generated. This will not cause the RST pin to be driven high.
In order to hold off the reset, the user has the following three options:
- Periodically change the compare value so it will never match the PCA timer.
- Periodically change the PCA timer value so it will never match the compare values.
- Disable the watchdog by clearing the WDTE bit before a match occurs and then re-enable it.
The first two options are more reliable because the watchdog timer is never disabled as in option #3. If the program counter ever goes astray, a match will eventually occur and cause an internal reset. The second option is also not recommended if other PCA Modules are being used. Remember, the PCA timer is the time base for all modules;
