We can proceed with Encrypted Microprocessor PIC18F8720 Program Reading, please view the Microprocessor PIC18F8720 features for your reference:
Like the standard CCP modules, the ECCP module can utilize Timers 1, 2 or 3, depending on the mode selected. Timer1 and Timer3 are available for modules in Capture or Compare modes, while Timer2 is available for modules in PWM mode. Interactions between the standard and enhanced CCP modules are identica to those described for standard CCP modules. Additional details on timer resources are provided in Section 15.1.1 “CCP Modules and Timer Resources” when read out the firmware from MCU.
Except for the operation of the Special Event Trigger discussed below, the Capture and Compare modes of the ECCP module are identical in operation to that of CCP2. These are discussed in detail in Section 15.2 “Capture Mode” and Section 15.3 “Compare Mode”. No changes are required when moving between 28-pin and 40/44-pin devices. The Special Event Trigger output of ECCP1 resets the TMR1 or TMR3 register pair, depending on which timer resource is currently selected. This allows the CCPR1 register to effectively be a 16-bit programmable period register for Timer1 or Timer3 before the code of microcontroller can be read.
When configured in Single Output mode, the ECCP module functions identically to the standard CCP module in PWM mode. When setting up single output PWM operations, users are free to use either of the processes described in Section 15.4.4 “Setup for PWM Operation” or Section 16.4.9 “Setup for PWM Operation”. The latter is more generic and will work for either single or multi-output PWM. The Enhanced PWM mode provides additional PWM output options for a broader range of control applications.
The module is a backward compatible version of the standard CCP module and offers up to four outputs, designated P1A through P1D. Users are also able to select the polarity of the signal (either active-high or active-low). The module’s output mode and polarity are configured by setting the P1M1:P1M0 andCCP1M3:CCP1M0 bits of the CCP1CON register after the eeprom content can be read out from IC.
Figure 16-1 shows a simplified block diagram of PWM operation. All control registers are double-buffered and are loaded at the beginning of a new PWM cycle (the period boundary when Timer2 resets) in order to prevent glitches on any of the outputs when Unlock Microcontroller. The exception is the PWM Delay register, PWM1CON, which is loaded at either the duty cycle boundary or the period boundary (whichever comes first).
Because of the buffering, th module waits until the assigned timer resets, instead of starting immediately. This means that enhanced PWM waveforms do not exactly match the standard PWM waveforms, but are instead offset by one full instruction cycle (4 TOSC).
