In addition to being a primary clock source, the internal oscillator block is available as a power-managed mode clock source. The INTRC source is also used as the clock source fcddor several special features, such as the WDT and Fail-Safe Clock Monitor after the completion of Encrypted Microcontroller PIC16F1906 Source Code Extraction.

The clock sources for the PIC16F1906 devices are shown in Figure 2-8. See Section 19.0 “Special Features of the CPU” for Configuration register details. The OSCCON register (Register 2-2) controls several aspects of the device clock’s operation, both in full power operation and in power-managed modes.

The System Clock Select bits, SCS1:SCS0, select the clock source. The available clock sources are the primary clock (defined by the FOSC3:FOSC0 Configuration bits), the secondary clock (Timer1 oscillator) and the internal oscillator block. The clock source changes immediately after one or more of the bits is written to, following a brief clock transition interval.

The SCS bits are cleared on all forms of Reset. The Internal Oscillator Frequency Select bits (IRCF2:IRCF0) select the frequency output of the internal oscillator block to drive the device clock. The choices are the INTRC source, the INTOSC source (8 MHz) or one of the frequencies derived from the INTOSC postscaler (31.25 kHz to 4 MHz). If the internal oscillator block is supplying the device clock, changing the states of these bits will have an immediate change on the internal oscillator’s output.

On device Resets, the default output frequency of the internal oscillator block is set at 1 MHz. When a nominal output frequency of 31 kHz is selected (IRCF2:IRCF0 = 000), users may choose which internal oscillator acts as the source. This is done with the INTSRC bit in the OSCTUNE register (OSCTUNE<7>).

Setting this bit selects INTOSC as a 31.25 kHz clock source by enabling the divide-by-256 output of the INTOSC postscaler. Clearing INTSRC selects INTRC (nominally 31 kHz) as the clock source to achieve the purpose of Microchip Microprocessor PIC16LF874 Heximal Extraction. This option allows users to select the tunable and more precise INTOSC as a clock source, while maintaining power savings with a very low clock speed.

Regardless of the setting of INTSRC, INTRC always remains the clock source for features such as the Watchdog Timer and the Fail-Safe Clock Monitor.