All PIC16F946 devices are capable of addressing a continuous 8K word block of program memory which is a critial point for Copy Microcontroller PIC16F946 Protected Code. The CALL and GOTO instructions provide only 11 bits of address to allow branching within any 2K program memory page.
When doing a CALL or GOTO instruction, the upper 2 bits of the address are provided by PCLATH<4:3>. When doing aCALL orGOTO instruction, the user must ensure that the page select bits are programmed so that the desired program memory page is addressed of PIC16F946 Protected Code.
If a return from a CALL instruction (or interrupt) is executed, the entire 13-bit PC is POPed off the stack. Therefore, manipulation of the PCLATH<4:3> bits is not required for the RETURN instructions (which POPs the address from the stack).
A computed GOTO is accomplished by adding an offset to the program counter (ADDWF PCL). When performing a table read using a computed GOTO method, care should be exercised if the table location crosses a PCL memory boundary (each 256-byte block).
Refer to the Application Note AN556, “Implementing a Table Read” (DS00556). The PIC16F917/916/914/913 family has an 8-level x 13-bit wide hardware stack. The stack space is not part of either program or data space and the Stack Pointer is not readable or writable.
The PC is PUSHed onto the stack when a CALL instruction is executed or an interrupt causes a branch by Copy Microcontroller PIC16F946 Protected Code. The stack is POPed in the event of a RETURN, RETLW or a RETFIE instruction execution. PCLATH is not affected by a PUSH or POP operation.
The stack operates as a circular buffer. This means that after the stack has been PUSHed eight times, the ninth PUSH overwrites the value that was stored from the first PUSH. The tenth PUSH overwrites the second PUSH (and so on).
The INDF register is not a physical register. Addressing the INDF register will cause indirect addressing. Indirect addressing is possible by using the INDF register. Any instruction using the INDF register actually accesses data pointed to by the File Select Register (FSR).
Reading INDF itself indirectly will produce 00h. Writing to the INDF register indirectly results in a no operation (although Status bits may be affected). An effective 9-bit address is obtained by concatenating the 8-bit FSR register and the IRP bit (STATUS<7>), A simple program to clear RAM location 20h-2Fh using indirect addressing.
