To set up an Asynchronous Transmission:
Initialize the SPBRGH:SPBRG registers for the appropriate baud rate by Copy Locked Firmware from Microprocessor dsPIC30F5013. Set or clear the BRGH and BRG16 bits, as required, to achieve the desired baud rate.

Enable the asynchronous serial port by clearing bit SYNC and setting bit SPEN.

If interrupts are desired, set enable bit TXIE.

If 9-bit transmission is desired, set transmit bit TX9. Can be used as address/data bit.

Enable the transmission by setting bit TXEN which will also set bit TXIF.

If 9-bit transmission is selected, the ninth bit should be loaded in bit TX9D.

Load data to the TXREG register (starts transmission).

If using interrupts, ensure that the GIE and PEIE bits in the INTCON register (INTCON<7:6>) are set.

The data is received on the RX pin and drives the data recovery block. The data recovery block is actually a high-speed shifter operating at x16 times the baud rate to Copy Locked Firmware from Microprocessor dsPIC30F5013, whereas the main receive serial shifter operates at the bit rate or at FOSC. This mode would typically be used in RS-232 systems.

To set up an Asynchronous Reception:

Initialize the SPBRGH:SPBRG registers for the the SYNC bit and setting the SPEN bit. appropriate baud rate. Set or clear the BRGH and BRG16 bits, as required, to achieve the desired baud rate.

Enable the asynchronous serial port by clearing

If interrupts are desired, set enable bit RCIE.

If 9-bit reception is desired, set bit RX9.

Enable the reception by setting bit CREN.

Flag bit, RCIF, will be set when reception is complete and an interrupt will be generated if enable bit, RCIE, was set.

Read the RCSTA register to get the 9th bit (if enabled) and determine if any error occurred during reception.

Read the 8-bit received data by reading the RCREG register.

If any error occurred, clear the error by clearing enable bit CREN.

If using interrupts, ensure that the GIE and PEIE bits in the INTCON register (INTCON<7:6>) are set