Read Heximal of Locked Microcontroller PIC18F4685 out from MCU’s locked memory which include flash and eeprom, then replicate the content from original into new MCU PIC18F4685 for the IC cloning;
The FREE bit, when set, will allow a program memory erase operation. When FREE is set, the erase operation is initiated on the next WR command. When FREE is clear, only writes are enabled. The WREN bit, when set, will allow a write operation.
On power-up, the WREN bit is clear. The WRERR bit is set in hardware when the WR bit is set and cleared when the internal programming timer expires and thewrite operation is complete.The Table Latch (TABLAT) is an 8-bit register mapped into the SFR space.
The Table Latch register is used to hold 8-bit data during data transfers between program memory and data RAM.The Table Latch (TABLAT) is an 8-bit register mapped into the SFR space when copy program from MCU PIC16LF872.
The Table Latch register is used to hold 8-bit data during data transfers between program memory and data RAM.TBLPTR is used in reads, writes and erases of the Flash program memory. When a TBLRD is executed, all 22 bits of the TBLPTR determine which byte is read from program memory into tablat.
When a TBLWT is executed, the six LSbs of the Table Pointer register (TBLPTR<5:0>) determine which of the 64 program memory holding registers is written.
When the timed write to program memory begins (via the WR bit), the 16 MSbs of the TBLPTR (TBLPTR<21:6>) determine which program memory block of 64 bytes is written to. For more detail, see Section 6.5 “Writing to Flash Program Memory”.
When an erase of program memory is executed, the 16 MSbs of the Table Pointer register (TBLPTR<21:6>) point to the 64-byte block that will be erased. The Least Significant bits (TBLPTR<5:0>) are ignored. Figure 6-3 describes the relevant boundaries of TBLPTR based on Flash program memory operations after microchip pic16f873 firmware copying.
The TBLRD instruction is used to retrieve data from program memory and places it into data RAM. Table reads from program memory are performed one byte at a time. TBLPTR points to a byte address in program space. Executing TBLRD places the byte pointed to into TABLAT. In addition, TBLPTR can be modified automatically for the next table read operation. The internal program memory is typically organized by words. The Least Significant bit of the address selects between the high and low bytes of the word. Figure 6-4 shows the interface between the internal program memory and the TABLAT.
