Readout Microchip PIC24FJ32GP203 Controller Firmware

Sleep and Idle modes Selectively Shut Down Peripherals and/or Core for Substantial Power Reduction and Fast Wake-up

Doze mode Allows CPU to Run at a Lower Clock Speed than Peripherals

Alternate Clock modes Allow On-the-Fly Switching to a Lower Clock Speed for Selective Power Reduction

Retention Sleep with On-Chip Ultra Low-Power Retention Regulator

Fail-Safe Clock Monitor Operation:

Detects clock failure and switches to on-chip, low-power RC Oscillator

Power-on Reset (POR), Brown-out Reset (BOR)

Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)

Programmable High/Low-Voltage Detect (HLVD)

Flexible Watchdog Timer (WDT) with RC Oscillator for Reliable Operation

Deadman Timer (DMT) for Safety-Critical Applications

Programmable 32-Bit Cyclic Redundancy Check (CRC) Generator

CodeGuard™ Security

ECC Flash Memory (64 Kbytes) with Fault Injection:

Single Error Correction (SEC)

Double-Error Detection (DED)

Customer OTP Memory

Unique Device Identifier (UDID)

Supply Voltage Range of 0V to 3.6V

Operating Ambient Temperature Range of -40°C to +125°C

On-Chip Voltage Regulators (1.8V) for Low-Power Operation

ECC Flash Memory (64 Kbytes):

10,000 erase/write cycle endurance, typical

Data retention: 20 years minimum

Self-programmable under software control

Flash OTP emulation

8-Kbyte SRAM

Programmable Reference Clock Output

In-Circuit Serial Programming™ (ICSP™) and In-Circuit Emulation (ICE) via Two Pins

JTAG Boundary Scan Support