We can Read Chip PIC16C76 Flash, please view the Chip PIC16C76 features for your reference:
The comparator interrupt flags are set whenever there is a change in the output value of its respective comparator. Software will need to maintain information about the status of the output bits, as read from CMCON0<7:6>, to determine the actual change that has occurred when read out the flash.
The CxIF bits, PIR2<6:5>, are the Comparator Interrupt flags. This bit must be reset in software by clearing it to ‘0’. Since it is also possible to write a ‘1’ to this register, a simulated interrupt may be initiated.
The CxIE bits (PIE2<6:5>) and the PEIE bit (INTCON<6>) must be set to enable the interrupts.
In addition, the GIE bit must also be set. If any of these bits are cleared, the interrupt is not enabled, though the CxIF bits will still be set if an interrupt condition occurs after read flash from chip.
The user, in the Interrupt Service Routine, can clear the interrupt in the following manner:
Any read or write of CMCON0. This will end the mismatch condition.
Clear flag bit CxIF
A mismatch condition will continue to set flag bit CxIF. Reading CMCON0 will end the mismatch condition and allow flag bits CxIF to be cleared. The comparator module also allows the selection of an internally generated voltage reference for one of the comparator inputs. The VRCON register, Register 8-3, controls the voltage reference module shown in Figure 8-6 after flash reading from chip.
The voltage reference can output 32 distinct voltage levels; 16 in a high range and 16 in a low range. The following equation determines the output voltages. The full range of VSS to VDD cannot be realized due to the construction of the module.
The transistors on the top and bottom of the resistor ladder network (Figure 8-6) keep CVREF from approaching VSS or VDD. The exception is when the module is disabled by clearing the VREN bit (VRCON<7>). When disabled, the reference voltage is VSS when VR<3:0> = 0000 before read the chip flash.
This allows the comparators to detect a zero-crossing and not consume CVREF module current. The voltage reference is VDD derived and therefore, the CVREF output changes with fluctuations in VDD. The tested absolute accuracy of the comparator voltage reference can be found in Section 19.0 “Electrical Specifications”.
